View UPA101B-E1_398832.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

GM62093A
GM62093A
12x 8 CROSSPOINT SWITCH WITH CONTROL MEMORY
Description
The GM62093A contains a 12x 8 array of crosspoint together with a 7 to 96 Line decoder and latch circuits. The GM62093A employs LG's advanced high voltage CMOS process technology. It provides extra low operating current and low power dissipation. Anyone of the 96 switchs can be addressed by selecting the ap-propriate 7 input bits. The selected turned on or off by applying a logical one or zero to the data in and the strobe input at logical one. A reset signal can be used to turn off all the switches together when is switched at logical one. The GM62093A is avail-able in a 40 lead dual in-line plastic and ceramic package. Feature * CMOS 12x 8 Cross Point Switch with Control Memory * Low On Resistance * Internal Control Latches * Ron 15 Max * Less Than 1% Total Distortion at 0 dbm * Extra Low Operating Current * Extra Low Cross-Talk Between Any Two Switches * Standard CMOS Noise Immunity * TTL Compatible Input
Pin Configuration
(Top View)
Y3 AY2 RESET AX3 AX0 NC NC X6 X7 X8 X9 X10 X11 NC Y7 NC Y6 STROBE Y5
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
VDD
Y2 DATA Y1 NC Y0 NC X0 X1 X2 X3 X4 X5 NC NC AY1 AY0 AX2 AX1 Y4
VSS
Application * PBX Systems * Mobile Radio * Test Eqiepment Instrumentation * Analog/ Digital Multiplexer
X0
Block Diagram
DATA RESET STROBE
1
8
0
7
ADDRESS
AX1 AX2 AX3 AY0 AY1 AY2
7 TO 96 DECODER
LATCHES
96
8 88
Y0
95
X11
Yi Input (i=0~7)
Y7
1
XiiInput (I=0~11)
AX0
GM62093A
Absolute Maximum Rating
SYMBOL VDD VIN IIN P(P-DIP) (C-DIP) TOPR TSTG PARAMETER DC Supply Voltage Input Voltage Range DC Input current Power Dissipation Operation Temperature Range Storage Temperature Range MIN -0.5 -0.5 MAX 18 V+0.5 10 0.6 1 70 150 UNIT V V mA W
C C
0 -65
Recommended Operating Range
SYMBOL VDD VIN TOPR PARAMETER DC Supply Input Voltage Range Operation Temperature Range MIN 8 0 0 MAX 16 VDD 70 UNIT V V
C
Static Electrical Characteristics: ( TA = 0C to 70C , VCC = 14V )
SYMBOL
CROSS POINT
PARAMETER
Quiescent Supply Current On Resistance Ron Difference Between Any Two Switchs Analog Signal Capability
TEST CONDITION
All Digital Input at Vss or VDD All Digital Input at 2.4 V
MIN
TYP
MAX
100
UNIT
A
mA
I DD
Ron Ron Asc
7
15 65 15
VDD = 3.5V and I(thru S/W)=10mA

V
VDD = 14V All Switchs On Vis = 14V and I(thru S/W)= -100A
All Switch off V=V=0 to V
13.96
14.0
I LOFF
CONTROLS
Off Leakage Input Low Voltage Input High Voltage Input Leakage
500
0.8 2.4
nA V V nA
VIL VIH I LEAK
VIN = 0 to VDD
500
2
GM62093A
Dynamic Electrical Characteristics : ( TA
SYMBOL CROSS POINT PARAMETER Propagation Delay Time Frequency Response [20log(VOUT/VIN)=-3dB] Sine Wave Response(Distortion) Feedthrough (All S/W's Off) Crosstalk Between Any Two Channels
= 25C , CL = 50pF , VDD = 14V
MIN
)
TYP MAX UNIT
TEST CONDITION R L = 1k, VDC = 5V VIS = 2VPP R L = 1k, VDC = 5V VIS = 2VPP , C L = 3p F R L = 1k, VDC = 5V , VIS = 2VPP , f = 1MHz R L = 1k, VDC = 5V VIS = 2VPP , f = 10KHz R S = 50, R L = 1k , VIS = 2VPP , f = 1KHz Switch Off Switch Off
tP f RES
30 40 1 -80 -110 -95 20 30 5
NS MHz % dB dB pF pF pF
CX CY C DI
CONTROL
Capacitance (XN to Ground) Capacitance (YN to Ground) Digital Input Capacitance Strobe to Switch Delay Data to Switch Delay Address to Switch Delay Reset to Switch Delay Data Setup Time Address Setup Time Data Hold Time Address Hold Time Minimum Strobe Pulse Width Minimum Reset Pulse Width
t DS t DD t DA t DR t SD t SA t HD t HA t SW t RW
R L = 1k, t r = t f = 20nS R L = 1k, t r = t f = 20nS R L = 1k, t r = t f = 20nS R L = 1k, t r = t f = 20nS R L = 1k, t r = t f = 20nS R L = 1k, t r = t f = 20nS R L = 1k, t r = t f = 20nS 30 30 200
160 180 200 200
nS nS nS nS nS nS nS
Functional Description
The GM62093A contains a 12 x 8 array of analog switches, each with a latch to maintain its on(closed)or off(opened) state. Seven ADDRESS lines(AX0~AX3, AY0~AY2) are provided to address any one of the 96 switches. After any one of the switches is selected, the DATA pin may be held high to turn the switch on, or low to turn it off. Finally a positive pulse to the STROBE pin initiates the ac-tion determined by the ADDRESS and DATA pins. All 96 switches can be turned off by forcing the RESET pin high.
3
GM62093A
Timing Diagram
t SW STROBE t SA ADDRESS t SD DATA t DD RESET t DR ANALOG OUTPUT t RW t HD t DA t DS t HA
Truth Table
AX0 0 1 0 1 0 1 0 1 0 1 0 1 0

AX1 0 0 1 1 0 0 0 0 1 1 0 0 0

AX2 0 0 0 0 1 1 0 0 0 0 1 1 0

Address AX3 0 0 0 0 0 0 1 1 1 1 1 1 0

AY0 0 0 0 0 0 0 0 0 0 0 0 0 1

AY1 0 0 0 0 0 0 0 0 0 0 0 0 0

AY2 0 0 0 0 0 0 0 0 0 0 0 0 0

Connections X0-Y0 X1-Y0 X2-Y0 X3-Y0 X4-Y0 X5-Y0 X6-Y0 X7-Y0 X8-Y0 X9-Y0 X10-Y0 X11-Y0 X0-Y1

1 0 1 0 1 0 1 0 1 0 1 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0
1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 1 0 1 0 1 0 1 0 1 0 1
1 0 0 1 1 0 0 1 1 0 0 1 1
0 1 1 1 1 0 0 0 0 1 1 1 1
0 0 0 0 0 1 1 1 1 1 1 1 1
X11-Y1 X0-Y2 X11-Y2 X0-Y3 X11-Y3 X0-Y4 X11-Y4 X0-Y5 X11-Y5 X0-Y6 X11-Y6 X0-Y7 X11-Y7
A X =0110, 1110, 0111 and 1111 and not allowed
4
GM62093A Test circuit and Characteristics.
l CROSSTALK vs. FREQUENCY Fig.1-Crosstalk l TEST CIRCUIT
VIN
-90
dB
-80
S/W ON
S/W ON VOUT
-100
50
1K
1K
1K
-110
5V
5V
5V
5V
-120
-130
VDD = 14 V VIN =2Vp-p
10
10 2
103
f(KHz)
l RESULT Fig.2 -analog signal capability(Vin vs. Vout) l TEST CIRCUIT
VDD
VDD = 12 12
VOUT
(V) VDD = 16 16
VIN
S/W ON
VOUT
8
VDD = 8
VDD = 4 4
VIN = 0 ~ 20 V VCONTROL = 5 V
0 4 8 12 16
(V) VIN
5
GM62093A
l RESULT Fig.3-Ron measurement l TEST CIRCUIT
VDD R ON
60
S.W ON
10mA
50
40
3.5V
30
+A V R ON = V V = I ON 10mA
20 6 8 10 12 14 16
VDD
VCONTROL = 5V VDD = 6 ~ 18 V
Fig.4-Frequency response. l TEST CIRCUIT
dB
0
l BANDWIDTH (-3dB point: ABOUT 45MHz)
-2
VIN
S/W ON
VOUT -4
-6
15K
-8
VDD = 14 V VIN=2Vp-p
-10 1 10 10 2
f(MHz)
6

▲Up To Search▲

Price & Availability of UPA101B-E1

	To Download UPA101B-E1 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .